Features
? Low-voltage and Standard-voltage Operation
– 1.8 (V CC = 1.8V to 5.5V)
? User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
?
?
?
Three-wire Serial Interface
2 MHz Clock Rate (5V)
Self-timed Write Cycle (5 ms max)
?
High Reliability
– Endurance: 1 Million Write Cycles
Three-wire
– Data Retention: 100 Years
? 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-MAP (MLP 2x3), 8-lead
TSSOP and 8-ball dBGA2 Packages
? Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
Serial
EEPROM
1K (128 x 8 or 64 x 16)
Description
The AT93C46D provides 1024 bits of serial electrically erasable programmable read-
only memory (EEPROM), organized as 64 words of 16 bits each (when the ORG pin is
connected to VCC), and 128 words of 8 bits each (when the ORG pin is tied to
ground). The device is optimized for use in many industrial and commercial applica-
tions where low-power and low-voltage operations are essential. The AT93C46D is
available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-
MAP (MLP 2x3), 8-lead TSSOP, and 8-lead dBGA2 packages.
The AT93C46D is enabled through the Chip Select pin (CS) and accessed via a
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the
data is clocked out serially on the DO pin. The Write cycle is completely self-timed,
and no separate Erase cycle is required before Write. The Write cycle is only enabled
when the part is in the Erase/Write Enable state. When CS is brought high following
the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
The AT93C46D is available in 1.8 (1.8V to 5.5V) version.
AT93C46D
Table 0-1.
Pin Name
Pin Configurations
Function
8 -le a d S OIC
8 -le a d dBGA2
CS
SK
Chip Select
Serial Data Clock
C S
S K
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
ORG
GND
VCC
NC
ORG
GND
8
7
6
5
1
2
3
4
C S
S K
D1
D0
DI
Serial Data Input
Bottom View
DO
Serial Data Output
8 -le a d PDIP
8 -le a d Ultr a Thin mini-MAP (MLP 2x 3 )
GND
Ground
C S
S K
1
2
8
7
VCC
NC
VCC
NC
8
7
1
2
C S
S K
VCC
ORG
Power Supply
Internal Organization
DI
DO
3
4
6
5
ORG
GND
ORG
GND
6
5
3 DI
4 DO
NC
No Connect
8 -le a d T SS OP
Bottom View
C S
S K
DI
1
2
3
8
7
6
VCC
NC
ORG
DO
4
5
GND
5193F–SEEPR–1/08
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